nRF52840 Power Management - Phase 1 - Boot Low VBAT Voltage Lockout

Added NRF52840 power management core functionality:
- Boot‑voltage lockout
- Initial support for shutdown/reset reason storage and capture (via RESETREAS/GPREGRET2)
- LPCOMP wake (for voltage-driven shutdowns)
- VBUS wake (for voltage-driven shutdowns)
- Per-board shutdown handler for board-specific tasks
- Exposed CLI queries for power‑management status in CommonCLI.cpp
- Added documentation in docs/nrf52_power_management.md.
- Enabled power management support in Xiao nRF52840, RAK4631, Heltec T114 boards

variants/xiao_nrf52/variant.h

@@ -75,6 +75,21 @@ static const uint8_t D10 = 10;
 #define AREF_VOLTAGE            (3.0)
 #define ADC_MULTIPLIER          (3.0F) // 1M, 512k divider bridge
 
+// Power management boot protection threshold (millivolts)
+// Set to 0 to disable boot protection
+#define PWRMGT_VOLTAGE_BOOTLOCK    3300   // Won't boot below this voltage
+
+// LPCOMP wake configuration (voltage recovery from SYSTEMOFF)
+#define PWRMGT_LPCOMP_AIN           7     // AIN7 = P0.31 = PIN_VBAT
+// IMPORTANT: The XIAO exposes battery via a resistor divider (ADC_MULTIPLIER = 3.0).
+// LPCOMP measures the divided voltage, not the battery voltage directly.
+// Vpin = VDD * (REFSEL fraction), and VBAT ≈ Vpin * ADC_MULTIPLIER.
+//
+// Using 3/8 VDD gives a wake threshold above the boot protection point:
+// - If VDD ≈ 3.0V:  VBAT ≈ (3.0 * 3/8) * 3 ≈ 3375mV
+// - If VDD ≈ 3.3V:  VBAT ≈ (3.3 * 3/8) * 3 ≈ 3712mV
+#define PWRMGT_LPCOMP_REFSEL   2     // 3/8 VDD (~3.38-3.71V)
+
 static const uint8_t A0  = PIN_A0;
 static const uint8_t A1  = PIN_A1;
 static const uint8_t A2  = PIN_A2;