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7ff1b7c86b
The per-read VBAT_ENABLE gating from4d46abb2(energy optimizations) powered the battery voltage divider HIGH for only 10ms before each ADC read, then LOW. 10ms is too short for the high-impedance divider node to settle before the nRF52 SAADC samples it, so readings came out high and inconsistent (e.g. 4.6-5.0V on a LiPo that maxes ~4.2V). Hold VBAT_ENABLE HIGH continuously again (as before4d46abb2) so the node is always settled at sample time, and drop the toggle + delay(10) from getBattMilliVolts(). Standby cost is ~2uA on the 2x1M divider, negligible next to the device's mA-level draw. The CPU-sleep and LED-off energy optimizations from4d46abb2are left untouched — those are the real savings; only the VBAT gating is reverted.